Haidar Harmanani

Professor of Computer Science
Interim Dean, School of Arts and Sciences

Haidar Harmanani is a professor of computer science in the Department of Computer Science and Mathematics and SoAS associate dean. He joined LAU in 1994 as an assistant professor.

Dr. Harmanani has served on the program committees of various international conferences, including the IEEE NEWCAS conference (2006-2012), the ABET Symposium in 2012, the IEEE Midwest Symposium on Circuits and Systems in 2007, the IEEE International Conference on Electronics, Circuits, and Systems, (ICECS 2000, ICECS 2006, ICECS 2007), the 14th IEEE International Conference on Microelectronics in 2002, the ACS/IEEE International Conference on Computer Systems and Applications in 2001, and the IEEE Design Automation and Test in Europe in 1998. Harmanani was the general chair of the 18th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2011) and the Technical Program chair of the 6th International Design and Test Workshop (IDT 2011). He has been an ABET program evaluator (Computer Science) since 2009.

Research Interests

    His research interests include electronic design automation, high-level synthesis, design for testability, and cluster parallel programming. He is a senior member of IEEE and a senior member of ACM.

    Selected Publications

    • G. Dibeh, H. Harmanani, “A Stochastic Chartist-Fundamentalist Model with Time Delays,” Computational Economics, Springer, 2012.
    • D. Azar, H. Harmanani, R. Korkmaz, “A Hybrid Heuristic Approach To Optimize Rule-Based Software Quality Estimation Models,” Information and Software Technology Journal, Volume 51, Number 9, pp. 1365-1376, Elsevier Science, September 2009.  
    • H. Harmanani, R. Sawan, “Test Bus Assignment, Sizing, and Partitioning for System-On-Chip,” IEEE Canadian Journal of Electrical and Computer Engineering, Volume 32, Number 3, pp. 165-175, Summer 2007.
    • H. Harmanani and H. Salamy, “Power-Constrained System-on-a-Chip Test Scheduling Using a Genetic Algorithm”, Journal of Circuits, Systems, and Computers, World Scientific Publishing, Volume 15, Number 3, June 2006.

    Academic degrees

    • PhD in computer engineering, 1994, Case Western Reserve University, US.
    • MS in computer engineering, 1991, Case Western Reserve University, US.
    • BS in computer engineering, 1989, Case Western Reserve University, US.